NAND gate

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Why in a NAND logic gate when the input is 1 0 the ouput is 1 ?
They supposed to be both 1 so that the output is 1 right ?

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@maxdog,

Check this out.
https://en.wikipedia.org/wiki/Logic_gate

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@seac,

thanks brother

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@seac,

still confused , in some information I find that a NAND gate is a series and in other I find it s a parallel gate.

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